This book is intended to serve as a textbook for a second course in the im- plementation (Le. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The target audience consists students in the final year of an undergraduate program or in the first year of a postgraduate program in computer science, computer engineering, or electrical engineering; professional computer designers will also also find the book useful as an introduction to the topics covered. Typically, the author has used the material presented here as the basis of a full-semester undergraduate course or a half-semester post- graduate course, with the other half of the latter devoted to multiple-processor machines. The background assumed of the reader is a good first course in computer architecture and implementation – to the level in, say, Computer Organization and Design, by D. Patterson and H. Hennessy – and familiarity with digital-logic design. The book consists of eight chapters: The first chapter is an introduction to all of the main ideas that the following chapters cover in detail: the topics covered are the main forms of pipelining used in high-performance uniprocessors, a taxonomy of the space of pipelined processors, and performance issues. It is also intended that this chapter should be readable as a brief "stand-alone" survey.
€161.96
भाषा अंग्रेज़ी ● स्वरूप PDF ● ISBN 9781475729894 ● प्रकाशक Springer US ● प्रकाशित 2013 ● डाउनलोड करने योग्य 3 बार ● मुद्रा EUR ● आईडी 4617051 ● कॉपी सुरक्षा Adobe DRM
एक DRM सक्षम ईबुक रीडर की आवश्यकता है
एक ही लेखक से अधिक ईबुक / संपादक
9,026 इस श्रेणी में ईबुक
