System Level Design of Reconfigurable Systems-on-Chip provides insight in the challenges and difficulties encountered during the design of reconfigurable Systems-on-Chip (So Cs). Reconfiguration is becoming an important part of System-on-Chip design to cope with the increasing demands for simultaneous flexibility and computational power.
The book focuses on system level design issues for reconfigurable So Cs, and provides information on reconfiguration aspects of complex So Cs and how they can be implemented in practice. It is divided in three parts. The first part provides background information and requirements on reconfigurable technologies and systems. The second one identifies existing methodological gaps, and introduces a design flow for developing reconfigurable Systems-on-Chip. The high level part of the design flow can be covered by two C++ based methodologies: one based on System C and one based on OCAPI-XL, both including appropriate extensions to handle reconfiguration issues. Finally, the third part of the book presents reconfigurable So Cs from the perspective of the designer, through three indicative case studies from the wireless and multimedia communication domain.
विषयसूची
to Reconfigurable Hardware.- Reconfigurable Hardware Exploitation in Wireless Multimedia Communications.- Reconfigurable Hardware Technologies.- Design Flow for Reconfigurable Systems-on-Chip.- System C Based Approach.- OCAPI-XL Based Approach.- MPEG-4 Video Decoder.- Prototyping of a HIPERLAN/2 Reconfigurable System-on-Chip.- WCDMA Detector.एक ही लेखक से अधिक ईबुक / संपादक
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