David Chinnery & Kurt Keutzer 
Closing the Power Gap between ASIC & Custom 
Tools and Techniques for Low Power Design

This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology.

Important topics include:
– Microarchitectural techniques to reduce energy per operation
– Power reduction with timing slack from pipelining
– Analysis of the benefits of using multiple supply and threshold voltages
– Placement techniques for multiple supply voltages
– Verification for multiple voltage domains
– Improved algorithms for gate sizing, and assignment of supply and threshold voltages
– Power gating design automation to reduce leakage
– Relationships among tatistical timing, power analysis, and parametric yield optimization

Design examples illustrate that these techniques can improve energy efficiency by two to three times.