Author: Krishnendu Chakrabarty

This book introduces new techniques for detecting and diagnosing small-delay defects (SDD) in integrated circuits. Although this sort of timing defect is commonly found in integrated circuits manufactured with nanometer technology, this will be the first book to introduce effective and scalable methodologies for screening and diagnosing small-delay defects, including important parameters such as process variations, crosstalk, and power supply noise. This book presents new techniques and methodologies to improve overall SDD detection with very small pattern sets. These methods can result in pattern counts as low as a traditional 1-detect pattern set and long path sensitization and SDD detection similar to or even better than n-detect or timing-aware pattern sets. The important design parameters and pattern-induced noises such as process variations, power supply noise (PSN) and crosstalk are taken into account in the methodologies presented. A diagnostic flow is also presented to identify whether the failure is caused by PSN, crosstalk, or a combination of these two effects. Provides an introduction to VLSI testing and diagnosis, with a focus on delay testing and small-delay defects; Presents the most effective techniques for screening small-delay defects, such as long path-based, slack-based, critical fault-based, and noise-aware methodologies; Shows readers to use timing information for small-delay defect diagnosis, in order to increase the resolution of their current diagnosis flow.